On the fab floor, the bake steps are where your thermal budget gets decided—one way or the other. A 2°C swing in soft bake or hard bake will move critical dimensions, and if particles show up during ramp-up, you can kiss the lot goodbye. Old-school heating just can’t keep up with the sub-degree repeatability advanced nodes demand without forcing you to choose between speed and control. What actually matters under the hood Medium wave infrared heaters dump energy straight into the wafer, with a spectrum that lines up to silicon absorption. That gives you fast thermal response and tight steady-state control. We hold wafer-level uniformity to ±0.1°C across the chuck, and setpoints stay repeatable within 0.2°C shift-to-shift. The build stays cleanroom-friendly—Class 1–100 compatible—using low-outgassing materials and a design that keeps particles out of the equation. Typical particle counts stay under 0.3 particles/cm² during the bake. The system runs 24/7 with zero unplanned downtime in pilot and volume lines, and the thermal profile stays stable over thousands of cycles. Why this fits the way we run Inside lithography clusters, these heaters cut bake time without wrecking the profile. Throughput goes up, and photoresist parameters stay inside spec. Energy use drops compared to broad-spectrum sources because the energy is tuned to the process, not wasted on parasitic heating. The process window opens up: critical dimension uniformity improves because the thermal profile tracks the recipe run after run. Over in packaging, that same precision keeps adhesive cures and film laminations stable, which means less rework and less scrap. The things you’ll want to get right up front Installation comes down to matching the heater footprint to the chuck and aligning the IR path so you don’t get shadowing. Plan for cleanroom-rated power and control connections, and confirm the thermal budget for the chamber walls. Medium wave works great for wafers, but it’s less forgiving on highly reflective substrates—those applications may need a tailored emitter layout or a small setpoint offset. Validate the recipe with a thermal profile wafer before you release, then lock the calibration down.